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Magnetic Logic Unit™ Memory

In addition to TAS-RAM, Crocus has developed a new concept named Self-Reference (SR) which is the heart of Magnetic Logic Unit (MLU) architecture. SR goes much further in resolving additional challenges and enabling new functionality and capability.

MRAM figureThe structure of SR MTJ is modified by the substitution of the base AF (that served to pin the reference layer in the fixed reference MTJ structure) with a magnetically free layer. As a result, the magnetization of this free layer is variable and subject to the magnetic field applied via the field line, and this layer is renamed as the sense layer.

The SR memory cell operates differently from the fixed reference (FR)-TAS memory cell. The mechanism of writing data into the memory cell in SR and FR configurations is identical: A small current flows through the MTJ and heats the cell to the critical write temperature, concurrently to the application of a magnetic field aimed to polarize the storage layer. Then, the MTJ is cooled while write field is applied, essentially "freezing" the magnetic state into the storage layer. The orientation of the sense layer is irrelevant during write operation. Crocus has optimized the heating current by including a proprietary thermal barrier inside and around the MTJ to maximize the incremental temperature.

However, the read mechanism in the FR and SR configuration is quite different.

In the SR case, read is achieved by measuring the MTJ resistance twice. The first measurement is performed with the sense layer aligned in one direction and the second measurement in the opposite direction. The alternative alignment of the sense layer is achieved by first driving a "north" current in the corresponding filed line followed immediately by a "south" current, which can be achieved in a 5 to 10ns time lapse. The magnitude of the field line current required to align the sense layer is roughly equal to field line current required to write sequence. But the power applied to the MTJ during read sequence is approximately one tenth of the power applied during write sequence. As a consequence, there is no risk of unwanted write due to self-heating during read.

The SR read not only enables a very robust memory cell but also allows it to be used as a true logic element. Direction of the current flowing in the field line can be used as an information input. The resistance of the cell now compares the stored information and the input information — if sense and storage are aligned this is high resistance and un-aligned sense and storage gives a low resistance. The element acts as an XOR (exclusive OR) logic device whose output depends on the comparison of the stored information and an input information (via the field line).